An IC architecture for RF Energy Harvesting systems

Leonardo Pantoli, Alfiero Leoni, Vincenzo Stornelli, Giuseppe Ferri


In this work we present an IC architecture for RF energy harvesting. The system has been designed with a 0.18μm CMOS SMIC technology and optimized at 900MHz. Simulation results have confirmed that the integrated system handles an incoming power typically ranging from -25 dBm to 20 dBm by rectifying the variable input signals into a DC voltage source with an overall efficiency up to 50%. The chip area estimation for the proposed system is as low as 3x3mm2.


Energy harvesting; integrated circuits; autonomous devices; RF signals; low-power.

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